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Publications - Martin Daněk


Books and chapters (4)
1. * Petr Honzík, Roman Bartosinski, Martin Daněk, Leoš Kafka, Lukáš Kohout, Jaroslav Sýkora: Video Processing: Foreground Recognition in the ASVP Platform. Smart Multicore Embedded Systems, 159-175. Springer, New York 2014.   Download
2. * Roman Bartosinski, Martin Daněk, Leoš Kafka, Lukáš Kohout, Jaroslav Sýkora: The Architecture and the Technology Characterization of an FPGA-Based Customizable Application-Specific Vector Coprocessor (ASVP). Smart Multicore Embedded Systems, 45-77. Springer, New York 2014.   Download
3. * Martin Daněk, Leoš Kafka, Lukáš Kohout, Jaroslav Sýkora, Roman Bartosinski: UTLEON3: Exploring Fine-Grain Multi-Threading in FPGAs. Circuits & Systems . Springer, New York 2013.
4. * Ch. Gamrat, J. M. Philippe, Ch. Jesshope, A. Shafarenko, L. Bisdounis, U. Bondi, A. Ferrante, J. Cabestany, M. Hübner, J. Pärsinnen, Jiří Kadlec, Martin Daněk, B. Tain, S. Eisenbach, M. Auguin, J. P. Diguet, E. Lenormand, J. L. Roux: AETHER: Self-Adaptive Networked Entities: Autonomous Computing Elements for Future Pervasive Applications and Technologies. Reconfigurable Computing. From FPGAs to Hardware/Software Codesign, 149-184. Springer, Londýn 2011.   Download

Journal articles (6)
1. * Martin Daněk, Leoš Kafka, Lukáš Kohout, Jaroslav Sýkora: Hardware Support for Fine-Grain Multi-Threading in LEON3. Carpathian Journal of Electronic and Computer Engineering 4:1 (2011), 27-34.   Download
2. * Martin Daněk, Petr Honzík, Jiří Kadlec, Zdeněk Pohl, Rudolf Matoušek: Platforma s částečnou dynamickou rekonfigurací FPGA. Automa 12:5 (2006), 40-43.
3. * Martin Daněk: Programovatelná hradlová pole - FPGA. Automa 12:2 (2006), 9-13.
4. * Rudolf Matoušek, Martin Daněk, H. Kubátová: Perspektivy dynamické rekonfigurace programovatelných polí FPGA. Sdělovací technika 54:4 (2006), 3-6.
5. * Martin Daněk, Petr Honzík, Jiří Kadlec, Rudolf Matoušek, Zdeněk Pohl: Reconfigurable system on programmable chip platform. ATMEL Applications Journal, 9-12.
6. * Rudolf Matoušek, Martin Daněk, Zdeněk Pohl, Roman Bartosinski, Petr Honzík: Reconfigurable System-on-a-Chip. Syndicated 5:2 (2005), 1-3.

Conference papers (27)
1. * Roman Bartosinski, Martin Daněk, Jaroslav Sýkora, Lukáš Kohout, P. Honzík: Foreground Detection and Image Segmentation in a Flexible ASVP Platform for FPGAs. Proceedings of the 2012 Conference on Design & Architectures for Signal & Image Processing, 375-376. Electronic Chips & Systems design Initiative, Gières 2012.   Download
2. * Jaroslav Sýkora, Lukáš Kohout, Roman Bartosinski, Leoš Kafka, Martin Daněk, P. Honzík: The Architecture and the Technology Characterization of an FPGA-based Customizable Application-Specific Vector Processor. Proceedings of the 2012 IEEE 15th International Symposium on Design and Diagnostics of Electronic Circuits and Systems, 62-67. IEEE, Tallinn, ESTONIA 2012.   Download
3. * Jaroslav Sýkora, Roman Bartosinski, Lukáš Kohout, Martin Daněk, P. Honzík: Reducing Instruction Issue Overheads in Application-Specific Vector Processors. Proceedings of the 15th Euromicro Conference on Digital System Design, DSD 2012, 600-607. Conference Publishing Services, Izmir 2012.   Download
4. * Roman Bartosinski, Martin Daněk, Jaroslav Sýkora, Lukáš Kohout, P. Honzík: Video Surveillance Application Based on Application Specific Vector Processors. Proceedings of the 2012 Conference on Design & Architectures for Signal & Image Processing, 248-255. Electronic Chips & Systems design Initiative, Gières 2012.   Download
5. * F. Pacull, K. Bertels, Martin Daněk, G. Urlini: SMECY: Smarti Multi-core Embedded SYstems (Special Session). Proceedings of 21st Great Lakes Symposium on VLSI Design - GLSVLSI 2011, 427-428. ACM Press, Lausanne 2011.   Download
6. * Jaroslav Sýkora, Leoš Kafka, Martin Daněk, Lukáš Kohout: Analysis of Execution Efficiency in the Microthreaded Processor UTLEON3. Architecture of Computing Systems - ARCS 2011, 110-121. Springer-Verlag Berlin Heidelberg, Berlin 2011.
7. * Jaroslav Sýkora, Leoš Kafka, Martin Daněk, Lukáš Kohout: Microthreading as a Novel Method for Close Coupling of Custom Hardware Accelerators to SVP Processors. 2011 14th Euromicro Conference on Digital System Design Architectures, Methods and Tools DSD 2011, 525-532. IEEE Computer Society Conference Publishing Services, Oulu, Finsko 2011.   Download
8. * Martin Daněk, Leoš Kafka, Lukáš Kohout, Jaroslav Sýkora: Instruction Set Extensions for Multi-Threading in LEON3. Proceedings of the13th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems, 237-242. IEEE, Los Alamitos 2010.   Download
9. * Jan Kloub, Petr Honzík, Martin Daněk: Reconfigurable Hardware Objects for Image Processing on FPGAs. Proceedings of the 13th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems, 121-122. Institute of Electrical and Electronics Engineers, Vienna 2010.   Download
10. * Jiří Kadlec, Martin Daněk, Lukáš Kohout: Proposed architecture of configurable, adaptable SoC. The IET Irish Signals and Systems Conference ISSC 2008, 368-373. Institution of Engineering and Technology, Londýn 2008.
11. * Martin Daněk, J.-M. Philippe, Roman Bartosinski, Petr Honzík, Ch. Gamrat: Self-Adaptive Networked Entities for Building Pervasive Computing Aschitectures. International Conference on Evolvable Systems: From Biology to Harware, 8th International Conference, ICES 2008, 94-105. Springer, Heidelberg 2008.   Download
12. * Martin Daněk, Jiří Kadlec, Roman Bartosinski, Lukáš Kohout: Increasing the Level of Abstraction in FPGA-based Designes. International Conference on Field Programmable Logic and Applications, 5-10. Kirchhoff Institute for Physics, Heidelberg 2008.   Download
13. * Roman Bartosinski, Martin Daněk, Petr Honzík, Jiří Kadlec: Modelling Self-Adaptive Networked Entities in Matlab/Simulink. Technical Computing Prague 2007, 1-8. Humusoft, Praha 2007.
14. * Jiří Kadlec, Roman Bartosinski, Martin Daněk: Accelerating MicroBlaze Floating Point Operations. Proceedings 2007 International Conference on Field Programmable Logic and Applications (FPL), 621-624. IEEE, Delft 2007.
15. * Leoš Kafka, Martin Daněk, O. Novák: A Novel Emulation Technique that Preserves Circuit Structure and Timing. International Symposium on System-on-Chip 2007 Proceedings, 15-18. IEEE, Tampere 2007.
16. * Leoš Kafka, Martin Daněk, O. Novák: Preservation of Circuit Structure and Timing during Fault Emulation in FPGA. IP 07 IP Based Electronic System Conference & Exhibition Proceedings, 493-497. EETimes Network, Grenoble 2007.
17. * Jiří Kadlec, Martin Daněk: Design and verification methodology for reconfigurable designs in Atmel FPSLIC. Proceedings of the 2006 IEEE Workshop on Design and Diagnostics of Electronic Circuits adn Systems, 79-80. Czech Technical University, Prague 2006.
18. * Roman Bartosinski, Martin Daněk, Petr Honzík, Rudolf Matoušek: Dynamic reconfiguration in FPGA-based SoC designs. Proceedings of the 8th IEEE Workshop on Designs and Diagnostics of Electronic Circuits nad Systems, 129-136. University of West Hungary, Sopron 2005.
19. * Martin Daněk, Zdeněk Pohl, K. Nasi, T. Karoubalis: Figaro - an automatic tool flow for designs with dynamic reconfiguration. Proceedings of the 2005 International Conference on Field Programmable Logic and Applications. FPL 2005, 590-593. Academy of Finland, Tampere 2005.
20. * Martin Daněk, Antonín Heřmánek, Petr Honzík, Jiří Kadlec, Rudolf Matoušek, Zdeněk Pohl: GIN - notetaker for blind people: An example of using dynamic reconfiguration of FPGAs. ACACES 2005. Advanced Computer Architecture and Compilation for Embedded Systems, 15-18. HiPEAC Network of Excellence, Ghent 2005.
21. * Roman Bartosinski, Martin Daněk, Petr Honzík, Rudolf Matoušek: Dynamic reconfiguration in FPGA-based SoC designs. ACACES 2005. Advanced Computer Architecture and Compilation for Embedded Systems, 35-38. HiPEAC Network of Excellence, Ghent 2005.
22. * Martin Daněk, Petr Honzík, Jiří Kadlec, Rudolf Matoušek, Zdeněk Pohl: Reconfigurable system-on-a-programmable-chip platform. Proceedings of the 7th IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems, 21-28. Institute of Informatics SAS, Bratislava 2004.
23. * Martin Daněk, Z. Muzikář: Evolutionary techniques in physical design for FPGAs. ECMS 2003. 6th International Workshop on Electronics, Control, Measurement and Signals, 274-278. Technical University, Liberec 2003.
24. * Rudolf Matoušek, Martin Daněk, Zdeněk Pohl, Jiří Kadlec: Dynamic runtime partial reconfiguration in FPGA. ECMS 2003. 6th International Workshop on Electronics, Control, Measurement and Signals, 294-298. Technical University, Liberec 2003.
25. * Martin Daněk: Integrated iterative approach to FPGA placement. Počítačové Architektury & Diagnostika PAD 2003, 43-50. VUT, Brno 2003.
26. * Rudolf Matoušek, Zdeněk Pohl, Martin Daněk, Jiří Kadlec: Dynamic reconfiguration of Atmel FPGAs. UK ACM SIGDA 3rd Workshop on Electronic Design Automation, 1-4. University of Southampton, Southampton 2003.
27. * Rudolf Matoušek, Zdeněk Pohl, Martin Daněk, Jiří Kadlec: Dynamic reconfiguration of FPGAs. Recent Trends in Multimedia Information Processing. Proceedings, 288-291. Czech Technical University, Prague 2003.

Other publications (15)
1. * Leoš Kafka, Roman Bartosinski, Martin Daněk: Accessory Tools for Partial Dynamic Reconfiguration on Xilinx FPGAs. ÚTIA AV ČR, Praha 2007.
2. * Jiří Kadlec, Martin Daněk, Jan Schier, Lukáš Kohout, Leoš Kafka, Jan Kloub, Jaroslav Stejskal, Jiří Svozil: Identifikace limitací dosavadních technologií v kontextu projektu VLAM. Research Report 2183. ÚTIA AV ČR, Praha 2007.
3. * Leoš Kafka, Martin Daněk: Development Kit for PicoBlaze Processor in FITkit Board. ÚTIA AV ČR, Praha 2007.
4. * Zdeněk Pohl, Martin Daněk: Flash Formatter. ÚTIA AV ČR, Praha 2007.
5. * Leoš Kafka, Martin Daněk: RETAC Application Notes 2005. ÚTIA AV ČR, Praha 2005.
6. * K. Nasi, Martin Daněk, T. Karoubalis, Zdeněk Pohl: Figaro: An automatic tool flow for designs with dynamic reconfiguration. Abstract. FPGA 2005 - ACM/SIGDA Thirteenth ACM International Symposium on Field-Programmable Gate Arrays, 262. ACM, Monterey 2005.
7. * Roman Bartosinski, Martin Daněk, Petr Honzík, Rudolf Matoušek: Dynamic reconfiguration in FPGA-based SoC designs. Abstract. FPGA 2005 - ACM/SIGDA Thirteenth ACM International Symposium on Field-Programmable Gate Arrays, 274. ACM, Monterey 2005.
8. * Martin Daněk, Rudolf Matoušek: Random Access FLASH Controller for Atmel FPSLIC. Research Report 2111. ÚTIA AV ČR, Praha 2004.
9. * Martin Daněk, Rudolf Matoušek: FLASH Formatter for the FLASH Expansion Board. Research Report 2112. ÚTIA AV ČR, Praha 2004.
10. * Martin Daněk, J. Kolář: FPGA modelling for high-performance algorithms. Abstract. FPGA 2004 ACM/SIGDA Twelfth International Symposium on Field-Programmable Gate Arrays, 251. ACM, Monterey 2004.
11. * Jiří Kadlec, Martin Daněk, Petr Honzík: Reconfigurable Scrolling Demo. Research Report 2117. ÚTIA AV ČR, Praha 2004.
12. * Jiří Kadlec, Martin Daněk, Petr Honzík: Reconfigurable 24-Bit Floating-Point Coprocessor Demo. Research Report 2116. ÚTIA AV ČR, Praha 2004.
13. * Martin Daněk, Radomil Matoušek: FLASH Read Controller for Atmel FPSLIC. Research Report 2114. ÚTIA AV ČR, Praha 2004.
14. * Martin Daněk, Rudolf Matoušek: Overlay Controller for Atmel FPSLIC. Research Report 2113. ÚTIA AV ČR, Praha 2004.

Miscellaneous (4)
1. * H. Kubátová, Ch. Hochberger, Martin Daněk, B. Sick: Architecture of Computing Systems - ARCS 2013. Lecture Notes in Computer Science 7767. Springer, Heidelberg 2013.   Download
2. * Roman Bartosinski, Martin Daněk, Jaroslav Sýkora, Lukáš Kohout: Foreground Detection and Image Segmentation in a Flexible ASVP Platform for FPGAs. 2012.
3. * Martin Daněk, Jiří Kadlec, B. Nelson: Proceedings 19th International Conference on Field Programmable Logic and Applications (FPL). ÚTIA AV ČR, Praha 2009.
4. * Jiří Kadlec, Milada Kadlecová, Martin Daněk: Workshop on Embedded Systems Education and Training.