Conference Paper (Czech conference)
: Počítačové Architektury & Diagnostika PAD 2003, p. 17-23 , Eds: Kotásek Z., Růžička R., Sekanina L.
: VUT, (Brno 2003)
: PAD 2003 Počítačové Architektury & Diagnostika, (Zvíkovské Podhradí, CZ, 24.09.2003-26.09.2003)
: CEZ:AV0Z1075907
: IST-2001-34016, Commission EC, LN00B096, GA MŠk
: dynamic reconfiguration, FPGA, reconfiguration cycle
(eng): This paper discusses dynamic reconfiguration achievable using current FPGA methodology. An analysis of implementation issues has been presented and desirable features of future generation of CAD tools have been discussed. Several practical examples have been presented together with their implementation data.
: 09G, 09H
: JC